Schematic Capture Improvements
View Alternative Pin Names
This release introduces the ability to view available alternative pin names. In the Component mode of the Properties panel on the Pins tab, use the Show Full/Show Short links at the top of the grid to show or hide the alternative pin names for all pins listed. When in Show Full mode, all extended names are displayed in the Name column and the search function will search for all extended names. When in Show Short mode, only the current pin name is displayed.
Display the full or short pin name; hover the cursor over the image to see full and short name examples.
PCB Design Improvements
Added Max Current and Resistance Values for Tuning Objects
Calculated Max Current and Resistance values are now available in the Net Information region of the Properties panel for a selected tuning object (i.e. Accordion, Sawtooth, and Trombone).
You may need to click Show More to view these values. Click Show Less to hide the values.
Max Current is the maximum current that the selected object(s) can carry as determined from the IPC-2221A formula (Section 6.2):
I = k * ΔT0.44 * A0.725
where:
I = current [amps]
A = cross-sectional area [sq mils] (trace width * layer stack copper thickness)
ΔT = allowable temperature rise above ambient [°C]
k = constant, such that:
k = 0.048 for outer layers
k = 0.024 for inner layers
When multiple objects are selected, for example, an entire net, the Max Current for that net is the smallest individual Max Current value of the selected objects.
Resistance is the sum of the resistance of the selected object(s) determined from the derived formula:
R = (ρ * L / A)
where:
R = resistance [Ω]
ρ = resistivity of copper [Ω*mm2/m]
L = trace length [m]
A = cross-sectional area = T * W [mm2]
T = trace thickness (from layerstack) [mm]
W = Trace width [mm]
Assumptions:
The total Resistance of the selected objects is the sum of the resistance of the individual objects.
- Ambient temperature = 22 °C
- Allowable temperature rise = 20 °C
- Thruhole copper wall thickness = 0.018mm
- Resistivity of copper = 0.017 Ω*mm2/m
Improved Detection of Minimum Annular Ring Violation
Violations of the Minimum Annular Ring design rule can now be detected for pads and vias with connections on layers on which pad/via shapes are smaller than the pad/via hole (e.g., if pad/via shapes have been configured manually in the Properties panel or removed by using the Remove Unused Pad Shapes tool). An example of the new behavior is shown in the image below.
An example of the improved violation detection for the Minimum Annular Ring design rule.
Note that if a pad or via has a shape size less than the hole size but not equal to 0, this will also result in a violation of the Minimum Annular Ring design rule. Therefore, if a pad is used to define a mounting hole (without pad shapes), it is recommended to set its shape values to 0.
This feature is in Open Beta and is available when the
PCB.Rules.MinimumAnnularRingConnected
option is enabled in the
Advanced Settings dialog.
Data Management Improvements
This release introduces support for adding a single, custom-named tag to any commit of a design project (and only where that project is stored in a Workspace under its internal Git VCS system). Tags can greatly help you to navigate through the project history quickly by 'tagging' a particular commit to share or help to quickly find the desired stage of the design. You can create a tag only for the commit that is already saved in the Workspace. Tags can be created when viewing the history for the project (right-click on the name of a project or document then choose History & Version Control » Show Project History. Click to open the menu then choose Create Tag as shown in the image below.
After running the command, the Create Tag dialog opens. Enter the desired tag then click Create. Tags are displayed on the History tab as shown below.
An information pop-up will open alerting you if there are illegal characters in the name of the Tag. The Tag will not be created until the illegal characters are removed.
If the project has commits that have not yet been pushed, the Save To Server dialog will open asking if you want to perform a push. If the commit is pushed, the Create Tag dialog will open.
When the project is released using the Project Releaser and its latest commit does not yet have a tag, a tag will be assigned automatically to this latest commit. This tag will be in the form of RELEASE_<RevisionID>
, where <RevisionID>
is the revision number of released project sources (A.1
, A.2
, etc.,), for example, RELEASE_A.3
.
A tag is created automatically for the latest commit by the Project Releaser.
You can rename or delete tags by clicking and then hovering over the Tag entry as shown below. A dialog will open in which you can enter the new name of the tag. If Remove is selected, the tag is deleted immediately.
The Create Tag command can also be accessed by right-clicking on the name of a project or document in the Projects panel and then choosing History & Version Control » Create Tag to create a tag for the last/latest commit.
Notes:
- There is no tag support for external version control.
- Only one (1) tag per commit can be created.
For more information regarding project history in Altium Designer, refer to the Project History page.
For information regarding project history using Altium 365, click here.
This feature is in Open Beta.
Сustom Part Providers
Added support for Custom Parts Providers when specifying preferred suppliers at the project level to be used by ActiveBOM when processing supply solutions. To access the Project Part Providers Preferences dialog, in the Properties panel of an ActiveBOM document (*.BomDoc
), click the Edit button associated with the Favorite Suppliers List in the Supply Chain region. Enable the Custom Parts Provider option to view your custom part sources along with all other providers.
Manufacturer Part Search Panel Improvements
Improvements to the Manufacturer Part Search panel introduced in this release make the panel more intuitive to work with searched components and populate your own Workspace Library.
Controls for Saving a Component
When connected to a Workspace, the panel’s controls will naturally align with component acquisition to that Workspace with the Save button, the Save to My Workspace command in the menu drop-down of this button, or the Save to My Workspace command of the component entry's right-click menu. Use the Save button to save the component to the current Workspace by choosing the component type and then choosing which component data you want to acquire.
The saving process can also be initiated by hovering over a component’s image in the results and then clicking to initiate the save process.
Saving a Component without Models
Previously, you could only acquire components that had models. This release allows you to save model-less components to your Workspace Library, obtaining them with their richness of parametric data and leaving you to whip up models at a later date.
Acquire component data even if the component has no models.
Resolving Mismatches between Parameters and Template
Detecting any mismatches between the naming of parameters between the component being acquired and a template in your Workspace, you can now fix such occurrences on the fly during acquisition, and save those changes to your global preferences. In the Use Component Data dialog, disable the Show only matching with template option to show all component parameters. For a parameter with a detected mismatch, use the Fix control to open the Parameter Mapping Configuration dialog and apply the changes as required.
Use the Parameter Mapping Configuration dialog to resolve mismatches between component parameters and the component template.
For those not enjoying the many benefits of a connected Workspace, the UI has similar controls for downloading as a file-based library.
More information about the
Manufacturer Part Search panel can be found
here.
Part Choice Management Permissions
This release sees an enhanced control for part choice management. The Edit Operation Permissions dialog now includes a new Part Choice Management entry. Using this entry, administrators of the Workspace can manage which users and roles are able to change component part choices.
The Part Choice Management entry in the Edit Operation Permissions dialog
Any user who does not have permission to manage part choices will be prevented from doing so when attempting to add/modify part choices for a component through the Component Editor (in its single and batch component editing modes).
A user will be prevented from editing a component's part choices if they do not have permission to do that.
A user without Part Choice Management permission will also be prevented from editing part choices when accessing the Operations » Create/Edit PCL command from the right-click menu of a Workspace component entry in the Components panel, accessing the Edit PCL in Library command from the Add Solution button menu in an ActiveBOM document or clicking the Edit button on the Part Choices aspect view tab of the Explorer panel when browsing a component.
Circuit Simulation Improvements
Default Settings for Digital and Analog Models
Default settings are now provided and used when ADC/DAC components are automatically inserted by the simulation engine to process analog-to-digital and digital-to-analog interconnections. Settings for digital input low and high voltage (DIGIL, DIGIH), digital input rise and fall delay times (DIGIRD, DIGIFD), digital output low and high voltages (DIGOL, DIGOH), digital output undefined voltage (DIGOU), and digital output rise and fall times (DIGOR, DIGOF) can be found on the Advanced tab of the Advanced Analysis Settings dialog (click Settings in the Simulation Dashboard panel).
Added Expressions for Capacitor and Inductor Models
For capacitor and inductor models, output voltage (v[<capacitorname>]
), power (p[<capacitorname>]
), and current (i[<capacitorname>]
) have been added as output variables when running an AC Analysis. These are available when adding output expressions prior to simulation. The variables have been added to the Add Output Expression dialog and can also be added as wave items using the Sim Data panel.
Features Made Fully Public in Altium Designer 22.10
The following features have been taken out of Open Beta and have transitioned to Public in this release: